Simulation and emulation
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Quick start
Building fabric
Fabric definition
FPGA CAD-tool parameterization
Yosys models
Nextpnr models
VPR models
RTL to Bitstream
Yosys compilation
Nextpnr compilation
VPR compilation
Bitstream generation
Simulation and emulation
Simulation setup
Emulation setup
Chip Gallery
References
code_generator.py
fabric.py
fabric_gen.py
file_parser.py
model_generation_npnr.py
model_generation_vpr.py
Definitions and abbreviations
Team and Contact
Publications
Table Of Contents
Quick start
Building fabric
Fabric definition
FPGA CAD-tool parameterization
Yosys models
Nextpnr models
VPR models
RTL to Bitstream
Yosys compilation
Nextpnr compilation
VPR compilation
Bitstream generation
Simulation and emulation
Simulation setup
Emulation setup
Chip Gallery
References
code_generator.py
fabric.py
fabric_gen.py
file_parser.py
model_generation_npnr.py
model_generation_vpr.py
Definitions and abbreviations
Team and Contact
Publications
Simulation and emulation
ΒΆ
-Running FABulous fabrics and user designs together with SoCs on commercial FPGAs
Simulation setup
Emulation setup
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