Table Of Contents
Table Of Contents

file_parser.py

fabric_generator.file_parser.parseConfigMem(fileName: str, maxFramePerCol: int, frameBitPerRow: int, globalConfigBits: int) → List[fabric_generator.fabric.ConfigMem]

Parse the config memory csv file into a list of ConfigMem objects

Parameters

  • fileName (str) – directory of the config memory csv file

  • maxFramePerCol (int) – maximum number of frames per column

  • frameBitPerRow (int) – number of bits per row

  • globalConfigBits (int) – number of global config bits for the config memory

Raises

  • ValueError – Invalid amount of frame entries in the config memory csv file

  • ValueError – Too many value in bit mask

  • ValueError – Length of bit mask does not match with the number of frame bits per row

  • ValueError – Bit mast does not have enough value matching the number of the given config bits

  • ValueError – repeated config bit entry in ‘:’ separated format in config bit range

  • ValueError – repeated config bit entry in list format in config bit range

  • ValueError – Invalid range entry in config bit range

Returns

_description_

Return type

List[ConfigMem]

fabric_generator.file_parser.parseFabricCSV(fileName: str) → fabric_generator.fabric.Fabric

Pares a csv file and returns a fabric object.

Parameters

fileName (str) – the directory of the csv file.

Raises

  • ValueError – File provide need to be a csv file.

  • ValueError – The csv file does not exist.

  • ValueError – Cannot find the FabricBegin and FabricEnd region.

  • ValueError – Cannot find the ParametersBegin and ParametersEnd region.

  • ValueError – The bel entry extension can only be “.v” or “.vhdl”.

  • ValueError – The matrix entry extension can only be “.list”, “.csv”, “.v” or “.vhdl”.

  • ValueError – Unknown tile description entry in csv file.

  • ValueError – Unknown tile in the fabric entry in csv file.

  • ValueError – Unknown super tile in the super tile entry in csv file.

  • ValueError – Invalid ConfigBitMode in parameter entry in csv file.

  • ValueError – Invalid MultiplexerStyle in parameter entry in csv file.

  • ValueError – Invalid parameter entry in csv file.

Returns

The fabric object.

Return type

Fabric

fabric_generator.file_parser.parseFileVHDL(filename: str, belPrefix: str = '') → Tuple[List[Tuple[str, fabric_generator.fabric.IO]], List[Tuple[str, fabric_generator.fabric.IO]], List[Tuple[str, fabric_generator.fabric.IO]], List[Tuple[str, fabric_generator.fabric.IO]], int, bool, Dict[str, int]]

Parse a VHDL bel file and return all the related information of the bel. The tuple returned for relating to ports will be a list of (belName, IO) pair.

For further example of bel mapping please look at parseFileVerilog

Parameters

  • filename (str) – The input file name.

  • belPrefix (str, optional) – The bel prefix provided by the CSV file. Defaults to “”.

Raises

  • ValueError – File not found

  • ValueError – No permission to access the file

  • ValueError – Cannot find the port section in the file which defines the bel ports.

Returns

Bel internal ports, bel external ports, bel config ports, bel shared ports, number of configuration bit in the bel, whether the bel have UserCLK, and the bel config bit mapping.

Return type

Tuple[List[Tuple[str, IO]], List[Tuple[str, IO]], List[Tuple[str, IO]], List[Tuple[str, IO]], int, bool, Dict[str, int]]

fabric_generator.file_parser.parseFileVerilog(filename: str, belPrefix: str = '') → Tuple[List[Tuple[str, fabric_generator.fabric.IO]], List[Tuple[str, fabric_generator.fabric.IO]], List[Tuple[str, fabric_generator.fabric.IO]], List[Tuple[str, fabric_generator.fabric.IO]], int, bool, Dict[str, Dict]]

Parse a Verilog bel file and return all the related information of the bel. The tuple returned for relating to ports will be a list of (belName, IO) pair.

The function will also parse and record all the FABulous attribute which all starts with

(* FABulous, <type>, ... *)

The <type> can be one the following:

  • BelMap

  • EXTERNAL

  • SHARED_PORT

  • GLOBAL

  • CONFIG_PORT

The BelMap attribute will specify the bel mapping for the bel. This attribute should be placed before the start of the module The bel mapping is then used for generating the bitstream specification. Each of the entry in the attribute will have the following format:

<name> = <value>

<name> is the name of the feature and <value> will be the bit position of the feature. ie. INIT=0 will specify that the feature INIT is located at bit 0. Since a single feature can be mapped to multiple bits, this is currently done by specifying multiple entries for the same feature. This will be changed in the future. The bit specification is done in the following way:

INIT_a_1=1, INIT_a_2=2, ...

The name of the feature will be converted to INIT_a[1], INIT_a[2] for the above example. This is necessary because Verilog does not allow square brackets as part of the attribute name.

EXTERNAL attribute will notify FABulous to put the pin in the top module during the fabric generation.

SHARED_PORT attribute will notify FABulous this the pin is shared between multiple bels. Attribute need to go with the EXTERNAL attribute.

GLOBAL attribute will notify FABulous to stop parsing any pin after this attribute.

CONFIG_PORT attribute will notify FABulous the port is for configuration.

Example

(* FABulous, BelMap,
single_bit_feature=0, //single bit feature, single_bit_feature=0
multiple_bits_0=1, //multiple bit feature bit0, multiple_bits[0]=1
multiple_bits_1=2 //multiple bit feature bit1, multiple_bits[1]=2
*)
module exampleModule (externalPin, normalPin1, normalPin2, sharedPin, globalPin);
    (* FABulous, EXTERNAL *) input externalPin;
    input normalPin;
    (* FABulous, EXTERNAL, SHARED_PORT *) input sharedPin;
    (* FABulous, GLOBAL) input globalPin;
    output normalPin2; //do not get parsed
    ...
Parameters

  • filename (str) – The filename of the bel file.

  • belPrefix (str, optional) – The bel prefix provided by the CSV file. Defaults to “”.

Raises
Returns

Bel internal ports, bel external ports, bel config ports, bel shared ports, number of configuration bit in the bel, whether the bel have UserCLK, and the bel config bit mapping.

Return type

Tuple[List[Tuple[str, IO]], List[Tuple[str, IO]], List[Tuple[str, IO]], List[Tuple[str, IO]], int, bool, Dict[str, Dict]]

fabric_generator.file_parser.parseList(fileName: str, collect: Literal['pair'] = 'pair') → List[Tuple[str, str]]
fabric_generator.file_parser.parseList(fileName: str, collect: Literal['source', 'sink']) → Dict[str, List[str]]

parse a list file and expand the list file information into a list of tuples.

Parameters

  • fileName (str) –

    ””

  • collect (Literal[&quot;&quot;, &quot;source&quot;, &quot;sink&quot;], optional) – Collect value by source, sink or just as pair. Defaults to “pair”.

Raises
Returns

Return either a list of connection pair or a dictionary of lists which is collected by the specified option, source or sink.

Return type

Union[List[Tuple[str, str]], Dict[str, List[str]]]

fabric_generator.file_parser.parseMatrix(fileName: str, tileName: str) → Dict[str, List[str]]

parse the matrix csv into a dictionary from destination to source

Parameters

  • fileName (str) – directory of the matrix csv file

  • tileName (str) – name of the tile need to be parsed

Raises

ValueError – Non matching matrix file content and tile name

Returns

dictionary from destination to a list of source

Return type

Dict[str, List[str]]

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