gen_switchmatrix

Switch matrix generation module for FABulous FPGA tiles.

This module generates RTL code for configurable switch matrices within FPGA tiles. Switch matrices handle the routing of signals between tile ports, BEL inputs/outputs, and jump wires. The module supports various configuration modes and multiplexer styles.

Key features:

  • CSV and list file parsing for switch matrix configurations

  • Support for custom and generic multiplexer implementations

  • Configuration bit calculation and management

  • Debug signal generation for switch matrix analysis

  • Multiple configuration modes (FlipFlop chain, Frame-based)

Functions

genTileSwitchMatrix(writer, tile, ...[, ...])

Generate the RTL code for the tile switch matrix.

gen_super_tile_switch_matrix(writer, superTile[, ...])

Generate the switch matrix RTL for a supertile.

Module Contents

genTileSwitchMatrix(writer, tile, switch_matrix_debug_signal, config_bit_mode=ConfigBitMode.FRAME_BASED, multiplexer_style=MultiplexerStyle.CUSTOM, default_pip_delay=80) → None[source]

Generate the RTL code for the tile switch matrix.

The switch matrix is read straight from the tile’s already-canonical tile.switch_matrix.connections (built once when the fabric was parsed); no CSV is written or re-read here. A tile whose matrix is hand-written HDL is skipped - it supplies its own switch matrix module.

Parameters:

  • writer (CodeGenerator) – The code generator instance for RTL output

  • tile (Tile) – The tile object containing BELs and port information

  • switch_matrix_debug_signal (bool) – Whether to generate debug signals for the switch matrix.

  • config_bit_mode (ConfigBitMode) – The configuration-bit mode for the tile (frame-based or flip-flop chain).

  • multiplexer_style (MultiplexerStyle) – The multiplexer style used to implement switch-matrix muxes.

  • default_pip_delay (int) – Per-mux delay (ps) emitted on assign statements in the switch matrix.

Raises:

ValueError – If any port in the switch matrix is not connected to anything.

gen_super_tile_switch_matrix(writer, superTile, config_bit_mode=ConfigBitMode.FRAME_BASED, multiplexer_style=MultiplexerStyle.CUSTOM, default_pip_delay=80) → None[source]

Generate the switch matrix RTL for a supertile.

The supertile switch matrix routes SJUMP output signals from child tiles to the input ports of supertile-level BELs. Its connectivity is described by superTile.supertile_matrix_dir (a .list or .csv file using the same format as tile switch matrices).

Parameters:

  • writer (CodeGenerator) – Code generator instance for RTL output.

  • superTile (SuperTile) – The supertile whose BELs and SJUMP ports drive this matrix.

  • config_bit_mode (ConfigBitMode) – Frame-based or flipflop-chain configuration.

  • multiplexer_style (MultiplexerStyle) – Custom or generic multiplexer implementation.

  • default_pip_delay (int) – Default PIP delay value for timing annotation.