Building your eFPGAΒΆ This contains a guide and information on building your custom eFPGA. Fabric definition Current Fabric Limitations Fabric CSV description Fabric layout Tiles Tile CSV description Wires Switch matrix Primitives Bitstream remapping Supertiles Modelling Supertile Functionality Building fabric FABulous Fabric Automation Generating Custom Tiles Generating and testing a custom tile Preparation Annotating the BEL Tile Config Generation Tile CSV Generation Switch Matrix Generation CAD Tool Integration Generating the Fabric Testing the Tile Working with multiple BELs Shared RESET and ENABLE Ports Carry Chains Annotating the BELs Generating the Custom Tile Generative IOs (GEN_IO) GEN_IO Parameters GEN_IO Example